New publication: Matteo Castellani, Owen Medeiros, Reed Foster, Alessandro Buzzi, Marco Colangelo, Joshua C. Bienfang, Alessandro Restelli, and Karl K. Berggren. “Nanocryotron ripple counter integrated with a superconducting nanowire single-photon detector for megapixel arrays,” Physical Review Applied, (2024).

This new publication was a featured editor’s suggestion from the APS . Here is how they summarize the article:

“Scaling up cryogenic systems, like arrays of superconducting nanowire single-photon detectors (SNSPDs), requires developing cryogenic coprocessors to minimize the number of cables exiting the cryostat. This work addresses this challenge by demonstrating the ability to read out, process, encode, and store data from SNSPDs using integrated nanowire electronics. The authors design a digital counter based on nanocryotrons—three-terminal nanowire devices—to perform signal processing and digitization at low temperatures. These results suggest that nanowire coprocessors could be developed, which would benefit the application of SNSPD arrays and other superconducting platforms.”

 

Abstract

Decreasing the number of cables that bring heat into the cryostat is a critical issue for all cryoelectronic devices. In particular, arrays of superconducting nanowire single-photon detectors (SNSPDs) could require more than 10⁶ readout lines. Performing signal-processing operations at low temperatures could be a solution. Nanocryotrons, superconducting nanowire three-terminal devices, are good candidates for integrating sensing and electronics on the same technological platform as SNSPDs in photon-counting applications. In this work, we demonstrate that it is possible to read out, process, encode, and store the output of SNSPDs using exclusively superconducting nanowires patterned on niobium nitride thin films. In particular, we present the design and development of a nanocryotron ripple counter that detects input voltage spikes and converts the number of pulses to an 𝑁-digit value. The counting base can be tuned from 2 to higher values, enabling higher maximum counts without enlarging the circuit. As a proof of principle, we first experimentally demonstrate the building block of the counter, an integer-𝑁 frequency divider with 𝑁 ranging from 2 to 5. Then, we demonstrate photon-counting operations at 405 nm and 1550 nm by coupling an SNSPD with a two-digit nanocryotron counter partially integrated on chip. The two-digit counter can operate in either base 2 or base 3, with a bit-error rate lower than 2×10⁻⁴ and a count rate of 10⁷s⁻¹. We simulate circuit architectures for integrated readout of the counter state and we evaluate the capabilities of reading out an SNSPD megapixel array that would collect up to 10¹² counts per second. The results of this work, combined with our recent publications on a nanocryotron shift register and logic gates, pave the way for the development of nanocryotron processors, from which multiple superconducting platforms may benefit.

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